1. Field of the Invention
The present invention generally relates to a method for preparing a sample stack structure and a sample stack structure. In particular, the present invention is directed to a method for preparing a sample stack structure by a combination of backside milling and dicing and a sample stack structure prepared by the method so as to be free from a curtain effect. The sample stack structure has a target layer which is attached to a dummy substrate part by an adhesive layer.
2. Description of the Prior Art
A transmission electron microscopy (TEM) plays an important role in the structural analysis and characterization of materials for process evaluation and failure analysis in the integrated circuit (IC) industry as the device shrinkage continues. It is well known that a high quality TEM sample is one of the key factors which enable to facilitate successful TEM analysis. Various cross-sectional TEM (XTEM) sample preparation techniques have been reported for these purposes.
These proposed techniques are generally categorized as below:
(1) dimpling or mechanical polishing and Ar+ ion milling;
(2) mechanical polishing and focused ion beam (FIB) milling;
(3) FIB milling and ex-situ lift-out;
(4) in-situ lift-out and FIB milling; or
(5) dicing saw and FIB milling.
The FIB milling has become a favorable choice as it offers several indispensable advantages compared to conventional mechanical techniques. For example, FIB milling allows a uniform thinning of complex heterogeneous structures with different sputtering rates and provides the capability and precision in localizing the specific regions of interest that is essential for site specific defect analysis. In addition, a dicing saw provides a good method to prepare TEM pre-thin samples with high efficiency.
In particular, a disadvantage called curtain effect, which causes uneven and damaged surfaces, is a well-known issue to TEM sample preparation. It becomes more serious with device size shrinking and low voltage milling utilization. Some adverse examples are given in FIG. 1, FIG. 2 and FIG. 3. FIG. 1 shows a TEM image in which the curtain effect (lighter and darker parallel patterns) damages the structures from top layer to Si-substrate. FIG. 2 shows another TEM image in which the curtain effect (lighter and darker parallel patterns) is observed, too. FIG. 3 shows a silicon map in which the sample surface is damaged and the damaged surface influences the analysis result of silicon elemental distribution mapping.
Given the above, a disadvantageous curtain effect results in poor quality of TEM analysis. A few methods were suggested to reduce the curtain effect, such as tilting the sample, polishing/dipping in acid to remove top layers or backside milling.
However, sample tilting cannot eliminate the curtain effect completely. For backside polishing, it can eliminate the curtain effect completely, but the thickness of the sample needs reducing in a first place, which is quite time consuming and needs more works for specific location analysis. As to polishing/dipping in acid to remove top layers, it is quite dangerous and complex.